1. Field of the Invention
The present invention relates to a high-frequency module for separating three or more communication signals using different frequency bands so as to transmit/receive the signals, and to a communication apparatus including such a high-frequency module.
2. Description of the Related Art
Various radio communication schemes, such as CDMA and TDMA schemes, are currently being used in mobile phones or other communications devices. The TDMA scheme includes GSM (Global System for Mobile Communications) using a 900 MHz band, DCS (Digital Cellular System) using a 1800 MHz band, and PCS (Personal Communication System) using a 1900 MHz band. Among them, PCS is allocated with a frequency band of 1850 to 1910 MHz for a transmission signal and a frequency band of 1930 to 1990 MHz for a reception signal. Also, DCS is allocated with a frequency band of 1710 to 1785 MHz for a transmission signal and a frequency band of 1805 to 1880 MHz for a reception signal.
When radio waves (communication signals) of the three different communication schemes (GSM, DCS, and PCS) are transmitted/received by an antenna, signals other than a signal of a frequency band used in actual communication are unnecessary. For example, when communication is performed in the GMS scheme (900 MHz band), communication signals of the DCS scheme (1800 MHz band) and the PCS scheme (1900 MHz band) are unnecessary.
With the miniaturization of mobile phones, each element constituting a mobile phone has been required to be miniaturized. Therefore, a high-frequency module for individually transmitting/receiving signals of different communication schemes should be improved, and a high-frequency module for integrating different communication schemes is required.
Accordingly, a high-frequency module need be miniaturized by using a diplexer for receiving radio waves of different communication schemes by a single antenna and extracting only a communication signal of a necessary communication scheme (frequency band) and a switch and duplexer for separating transmission and reception signals of each communication scheme.
In order to transmit/receive communication signals of the three different frequency bands, a high-frequency module shown in FIGS. 8 and 9 has been proposed.
FIG. 8 is a block diagram showing a known high-frequency module for separately transmitting/receiving each of signals of GSM, DCS, and PCS; and FIG. 9 shows the equivalent circuit thereof.
As shown in FIG. 8, the known high-frequency module for transmitting/receiving signals of GSM, DCS, and PCS includes a GSM transmitting/receiving unit, a PCS/DCS transmitting/receiving unit, and a diplexer DiPX connected between the transmitting/receiving units and an antenna ANT. The GSM transmitting/receiving unit includes a GSM Tx terminal to which a GSM transmission signal is input, a GSM Rx terminal for outputting a GSM reception signal, a low-pass filter LPF1 for allowing the GSM transmission signal to pass therethrough, a SAW filter SAW1 for allowing the GSM reception signal to pass therethrough, and a switching circuit SAW1 for switching the GSM transmission/reception signals, between the SAW filter SAW1 and the diplexer DiPX.
The PCS/DCS transmitting/receiving unit includes a PCS/DCS Tx terminal to which PCS/DCS transmission signals are input, a PCS Rx terminal for outputting a PCS reception signal, a DCS Rx terminal for outputting a DCS reception signal, a low-pass filter LPF2 for allowing the PCS/DCS transmission signals to pass therethrough, a SAW filter SAW2 for allowing the PCS reception signal to pass therethrough, a SAW filter SAW3 for allowing the DCS reception signal to pass therethrough, and a switching circuit SAW2 for switching the PCS/DCS transmission signals, the DCS reception signal, and the PCS reception signal, between the SAW filter SAW3 and the diplexer DiPX.
The diplexer DiPX includes a low-pass filter LPF0 for allowing the GSM transmission/reception signals to pass therethrough and a band-pass filter BPF0 for allowing the PCS/DCS transmission/reception signals to pass therethrough. The antenna ANT is connected to a junction point between the low-pass filter LPF0 and the band-pass filter BPF0.
A more specific circuit structure is shown in FIG. 9. The switching circuit SW1 includes a diode D1, the cathode thereof being connected to the low-pass filter LPF1 and the anode thereof being connected to the low-pass filter LPF0 of the diplexer DiPX, an inductance element GSL1 connected between the cathode of the diode D1 and the ground, a transmission line GSL2 connected between the anode of the diode D1 and the SAW filter SAW1, a diode D2, the cathode thereof being connected to a junction point between the transmission line GSL2 and the SAW filter SAW1, a control-voltage input terminal Vc1 connected to the anode of the diode D2 through a resistor R1, and a capacitance element GC5 connected between the anode of the diode D2 and the ground.
The switching circuit SW2 includes a diode D3, the anode thereof being connected to the low-pass filter LPF2 and the cathode thereof being connected to the band-pass filter BPF0 of the diplexer DiPX, a series circuit including an inductance element DPSLt and a capacitance element DPCt1 connected in parallel with the diode D3, a control-voltage input terminal Vc2 connected to the anode of the diode D3 through an inductance element DPSL1, and a capacitance element DPC4 connected between a junction point of the inductance element DPSL1 and the control-voltage input terminal Vc2 and the ground. Also, the switching circuit SW2 includes a transmission line DSL2 connected between the cathode of the diode D3 and the SAW filter SAW3, a diode D5, the anode thereof being connected to a junction point of the transmission line DSL2 and the SAW filter SAW3, and a parallel circuit including a resistor R2 and a capacitance element DC5 connected between the cathode of the diode 5 and the ground. Further, the switching circuit SW2 includes a diode D4, the anode thereof being connected to the SAW filter SAW2 and the cathode thereof being connected to the band-pass filter BPF0 of the diplexer DiPX, a series circuit including an inductance element PSLt and a capacitance element PCt1 connected in parallel to the diode D4, a control-voltage input terminal Vc3 connected to the anode of the diode D4 through an inductance element PSL1, and a capacitance element PC4 connected between a junction point of the inductance element PSL1 and the control-voltage input terminal Vc3 and the ground.
In this high-frequency module, transmission/reception of communication signals of GSM/PCS/DCS is controlled by a voltage input to the control-voltage input terminal of each switching circuit, as shown in Table 1. Table 1 shows the relationship between the state of voltage input to each control-voltage input terminal and the transmission/reception state of GSM/PCS/DCS.
TABLE 1Vc1Vc2/Vc3Hi/LowPCS,DCS TxHiGSM TxLow/HiPCS RxLowGSM RxLow/LowDCS Rx
As shown in FIG. 9 and Table 1, when the control-voltage input terminal Vc1 is in a Hi level, the diodes D1 and D2 are ON, and the transmission line GSL2 functions as a phase-shift circuit for shifting phase so that the GSM reception side viewed from a junction point between the transmission line GSL2 and the anode of the diode D1 is open to the frequency of the GSM transmission signal. Accordingly, the GSM transmission signal is not transmitted to the GSM reception side through the diode D1, but is transmitted to the diplexer DiPX. On the other hand, when the control-voltage input terminal Vc1 is in a Low level, the diodes D1 and D2 are OFF and are opened. Therefore, the GSM reception signal from the diplexer DiPX is not transmitted to the GSM transmission side but is transmitted to the GSM reception side through the transmission line GSL2.
When the control-voltage input terminal Vc2 is in a Hi level and when the control-voltage input terminal Vc3 is in a Low level, the diodes D3 and D5 are ON and the diode D4 is OFF. At this time, the transmission line DSL2 functions as a phase-shift circuit for shifting phase so that the DCS reception side viewed from a junction point between the transmission line DSL2 and the cathode of the diode D3 is open to the frequencies of the PCS/DCS transmission signals. Also, the diode D4 is opened and the PCS reception side is open to the frequencies of the PCS/DCS transmission signals. More precisely, since the diode D4 functions as a capacitance element having a small capacitance in its OFF state, parallel resonance of the capacitance of the diode D4 and the inductance element PSLt increases the impedance to the frequencies of the PCS/DCS transmission signals, so that the PCS reception side is opened. Accordingly, the PCS/DCS transmission signals are not transmitted to the PCS/DCS reception sides, but are transmitted to the diplexer DiPX.
On the other hand, when the control-voltage input terminal Vc2 is in a Low level and the control-voltage input terminal Vc3 is in a Hi level, the diode D3 is OFF and the diodes D4 and D5 are ON. Therefore, the transmission line DSL2 functions as a phase-shift circuit for shifting phase so that the DCS reception side viewed from a junction point between the transmission line DSL2 and the cathode of the diode D3 is open to the frequencies of the PCS/DCS transmission signals. Also, the diode D3 is opened and the PCS/DCS transmission side is opened. More precisely, since the diode D3 functions as a capacitance element having a small capacitance in its OFF state, parallel resonance of the capacitance of the diode D3 and the inductance element DPSLt increases the impedance to the frequencies of the PCS/DCS transmission signals, so that the PCS/DCS transmission side is opened. Although the PCS reception signal passes through the transmission line DSL2, it is blocked by the SAW filter SAW3. Accordingly, the PCS reception signal is transmitted only to the PCS reception side.
When both of the control-voltage input terminals Vc2 and Vc3 are in a Low level, the diodes D3 to D5 are OFF, and thus the diodes D3 and D4 are open and the PCS/DCS transmission side and the PCS reception side are open to the DCS reception signal. Accordingly, the DCS reception signal is transmitted only to the DCS reception port through the transmission line DSL2.
As another example of a high-frequency module for controlling transmission/reception signals by operating voltage input to control-voltage input terminals of switching circuits, a high-frequency module shown in FIGS. 10 and 11 has been proposed.
FIG. 10 is a block diagram of another known high-frequency module and FIG. 11 is the equivalent circuit diagram thereof. The configuration of a GSM transmitting/receiving unit of the high-frequency module shown in FIGS. 10 and 11 is the same as that of the high-frequency module show in FIGS. 8 and 9.
In the high-frequency module shown in FIGS. 10 and 11, the PCS/DCS transmission/reception side of the diplexer DiPX is provided with a high-pass filter HPF0, and a switching circuit SW2 is connected to the PCS/DCS side of the diplexer DiPX. The switching circuit SW2 is connected to a PCS/DCS Tx terminal through a low-pass filter LPF3. Also, the switching circuit SW2 is connected to SAW filters SAW2 and SAW3 through phase-shift circuits PSC1 and PSC2, respectively, and the SAW filters SAW2 and SAW3 are connected to a PCS Rx terminal and a DCS Rx terminal, respectively.
The switching circuit SW2 includes a diode D3, the anode thereof being connected to the high-pass filter HPF0 of the diplexer DiPX and the cathode thereof being connected to the low-pass filter LPF3, a series circuit including an inductance element DSLt and a capacitance element DSC connected in parallel with the diode 3, an inductance element DSL1 connected between the cathode of the diode D3 and the ground, a transmission line DSL2 connected between the anode of the diode D3 and the phase-shift circuits PSC1 and PSC2, a diode D4, the cathode thereof being connected to a junction point between the transmission line DSL2 and the phase-shift circuits PSC1 and PSC2, a control-voltage input terminal Vc2 connected to the anode of the diode D4 through a resistor Rd, and capacitance elements DC5 and DC6 connected between both ends of the resistor Rd and the ground.
In this high-frequency module, transmission/reception state is controlled by operating voltage input to the control-voltage input terminals, as shown in Table 2. The GSM side is the same as in FIG. 9, and thus the corresponding description will be omitted.
TABLE 2Vc1Vc2HiGSM TxHiPCS,DCS TxLowGSM RxLowPCS,DCS Rx
When the control-voltage input terminal Vc2 is in a Hi level, the diodes D3 and D4 are ON, and the transmission line DSL2 functions as a phase-shift circuit for shifting phase so that the PCS/DCS reception port sides viewed from a junction point between the transmission line DSL2 and the anode of the diode D3 are open to frequencies of the PCS/DCS transmission signals. Accordingly, the PCS/DCS transmission signals are not transmitted to the PCS/DCS reception sides, but are transmitted only to the diplexer DiPX. On the other hand, when the control-voltage input terminal Vc2 is in a Low level, the diodes D3 and D4 are OFF and the diode D3 is opened, so that the PCS/DCS transmission terminal side is opened. More precisely, since the diode D3 functions as a capacitance element having a small capacitance, parallel resonance of the capacitance of the diode D3 and the inductance element DSLt increases the impedance to the frequencies of the PCS/DCS transmission signals and the DCS reception signal, so that the PCS/DCS transmission side is opened. Although the PCS reception signal passes through the switching circuit SW2, it is blocked by the low-pass filter LPF3. Accordingly, the PCS/DCS reception signals are transmitted only to the PCS/DCS reception terminal sides through the transmission line DSL2. The transmitted PCS/DCS reception signals are matched by the phase-shift circuits PSC1 and PSC2, respectively. Then, the PCS reception signal is output to the PCS Rx terminal through the SAW filter SAW2 and the DCS reception signal is output to the DCS Rx terminal through the SAW filter SAW3.
In this way, apparatuses for transmitting/receiving a plurality of communication signals of different frequency bands have been proposed (for example, see Patent Document 1: Japanese Unexamined Patent Application Publication No. 10-32521 and Patent Document 2: Japanese Unexamined Patent Application Publication No. 2001-160766).
However, the above-described high-frequency modules for transmitting/receiving GSM/PCS/DCS signals have the following problems to be solved.
In the high-frequency modules shown in FIGS. 8 and 10, sufficient isolation of the phase-shift circuit in the DCS Rx terminal side cannot be obtained when the PCS signal is transmitted, and the PCS transmission signal flows to the DCS Rx terminal. However, the frequency band of the PCS transmission signal partially overlaps the frequency band of the DCS reception signal. Thus, the SAW filter SAW3 connected to the DCS Rx terminal allows the PCS transmission signal to pass therethrough, so that the SAW filter SAW3 and an LNA connected in the subsequent stage of the DCS Rx terminal may be broken. Actually, isolation in the DCS Rx side when the PCS signal is transmitted needs to be at least about 32 dBm. However, the above-described known circuits can attenuate only 25 dBm. Also, in the circuit shown in FIG. 8, the control-voltage input terminal must be changed to a Hi level when receiving the PCS signal, and thus current consumption is generated while waiting for the PCS signal.